supertex inc. supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 tel: 408-222-8888 www.supertex.com hv507 features processed with hvcmos ? technology operating output voltages to 300vlow power level shifting from 5.0 to 300v shift register speed: 8.0mhz @ v dd = 5.0v 64 latched data outputs output polarity and blanking cmos compatible inputs forward and reverse shifting options ?? ? ? ? ? ? ? functional block diagram 64-channel serial to parallel converter with high voltage push-pull outputs general description the hv507 is a low voltage serial to high voltage parallel converter with 64 push-pull outputs. this device has been designed for use as a printer driver for electrostatic applications. it can also be used in any application requiring multiple output, high voltage, low current sourcing and sinking capabilities. the device consists of a 64-bit shift register, 64 latches, and control logic to perform the polarity select and blanking of the outputs. a dir pin controls the direction of data shift through the device. with dir grounded, d io a is data-in and d io b is data-out; data is shifted from hv out 64 to hv out 1. when dir is at logic high, d io b is data-in and d io a is data-out: data is then shifted from hv out 1 to hv out 64. data is shifted through the shift register on the low to high transition of the clock. data output buffers are provided for cascading devices. operation of the shift register is not affected by the le (latch enable), bl (blanking), or the pol(polarity) inputs. transfer of data from the shift register to the latch occurs when the le is high. the data in the latch is stored during le transition from high to low. hv out 2 ?? ? 60 additional outputs ?? ? hv out 63 pol bl latch enable clock 64 latches vpp hv out 1 dir hv out 64 d io b l/t l/t l/t l/t l/t = level translator d io a 64 bit static shift register downloaded from: http:///
2 hv507 supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 tel: 408-222-8888 www.supertex.com ordering information device package option 80-lead quad plastic gullwing 20.00x14.00mm body 3.40mm height (max) 0.65mm pitch hv507 HV507PG-G -g indicates package is rohs compliant (green)absolute maximum ratings parameter value supply voltage, v dd -0.5v to +6.0v supply voltage, v pp v dd to +320v logic input levels -0.5v to v dd +0.5v ground current 2 0.5a high voltage supply current 1 0.5a continuous total power dissipation 2 1200mw operating temperature range 0c to +70c storage temperature range -65c to +150c absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditions is not implied. continuous operation of the device at the absolute rating level may affect device reliability. all voltages are referenced to gnd. notes: connection to all power and ground pads is required. duty cycle is limited by the total power dissipated in the package.for operation above 25c ambiant derate linearly to 70 o c at 26.7mw/c. 1.2. recommended operating conditions sym parameter min typ max units v dd logic supply voltage 4.5 5.0 5.5 v v pp high voltage supply 60 - 300 v v ih high-level input voltage v dd -0.9 - v dd v v il low-level input voltage 0 - 0.9 v t a operating free-air temperature 0 - +70 c power-up sequence should be the following: connect groundapply v dd set all inputs (data, clk, enable, etc.) to a known stateapply v pp the v pp should not drop below v dd or ?oat during operation. power-down sequence should be the reverse of the above. 1.2. 3. 4. 5. pin con?guration product marking 80-lead quad plastic gullwing (pg) 80-lead quad plastic gullwing (pg) (top view) 1 80 hv507pg llllllllll yyww cccccccc aaa l = lot number yy = year sealed ww = week sealed c = country of origin a = assembler id = green packaging package may or may not include the following marks: si or downloaded from: http:///
3 hv507 supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 tel: 408-222-8888 www.supertex.com electrical characteristicsdc characteristics (for v dd = 5.0v, v pp = 300v, t a = 25c) sym parameter min max units conditions i dd v dd supply current - 15 ma f clk = 8.0mhz, f data = 4.0mhz, le = low i ddq quiescent v dd supply current - 200 a all v in = 0 or v dd i pp high voltage supply current - 0.50 ma v pp = 300v. all outputs high. - 0.50 v pp = 300v. all outputs low. i ih high-level logic input current - 10 a v ih = v dd i il low-level logic input current - -10 a v il = 0v v oh high level output hv out 265 - v v pp = 300v, ihv out = -1.0ma, id out = -100a data out v dd -1.0v - v ol low level output hv out - 35 v v dd = 5.0v, ihv out = +1.0ma, data out - 1.0 id out = +100a v oc hv out clamp voltage - v pp +1.5v v i oc = +1.0ma - -30 i oc = -1.0ma ac characteristics 1 (for v dd = 5.0v, v pp = 300v, t a = 25c) sym parameter min max units conditions f clk clock frequency - 8.0 mhz --- t w clock width high or low 62 - ns --- t su data set-up time before clock rises 35 - ns --- t h data hold time after clock rises 30 - ns --- t wle le pulse width 80 - ns --- t dle delay time clock to le high to low 35 - ns --- t sle le set-up time before clock rises 40 - ns --- t on, t off time from le to hv out - 4.0 s c l = 20pf t dhl delay time clock to data high to low - 125 ns c l = 20pf t dlh delay time clock to data low to high - 125 ns c l = 20pf t r , t f all logic inputs - 5.0 ns --- note: shift register speed can be as low as dc as long as data set-up and hold time meet the spec. 1. downloaded from: http:///
4 hv507 supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 tel: 408-222-8888 www.supertex.com switching waveforms latch enable hv out w/ s/r low data valid 50% 50% data in (d io a/d io b) clk t su t h t wl t wh 50% 50% t dlh t dhl 50% t wle t dle t sle 50% 50% t on 10% 90% 90% 10% t off v ih v il v ih v il v oh v ol v oh v ol v oh v ol v oh v ol v oh v ol data out (d io a/d io b) hv out w/ s/r high input and output equivalent circuits vdd input gnd vpp hvgnd hv out logic inputs gnd data out logic data output high voltage outputs vdd downloaded from: http:///
5 hv507 supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 tel: 408-222-8888 www.supertex.com function table function inputs outputs data clk le bl pol dir shift reg hv outputs data out * 1 2...64 1 2...64 all on x x x l l x * *...* h h...h * all off x x x l h x * *...* l l...l * invert mode x x l h l x * *...* * *...* * load s/r h or l l h h x h or l *...* * *...* * store data in latches x x h h x * *...* * *...* * x x h l x * *...* * *...* * transparent latch mode l h h h x l *...* l *...* * h h h h x h *...* h *...* * i/o relation d io a x x x l q n q n+1 - d io b d io b x x x h q n q n+1 - d io a notes: h = high level, l = low level , x = irrelevant, = low-to-high transition = high-to-low transit ion. * = dependent on previous stages state before the last clk high-to-low transition or last le hig h. pin # function 1 hv out 41 2 hv out 42 3 hv out 43 4 hv out 44 5 hv out 45 6 hv out 46 7 hv out 47 8 hv out 48 9 hv out 49 10 hv out 50 11 hv out 51 12 hv out 52 13 hv out 53 14 hv out 54 15 hv out 55 16 hv out 56 17 hv out 57 18 hv out 58 19 hv out 59 20 hv out 60 pin # function 21 hv out 61 22 hv out 62 23 hv out 63 24 hv out 64 25 vpp 26 d io a 27 n/c 28 n/c 29 bl 30 pol 31 vdd 32 dir 33 gnd 34 hvgnd 35 n/c 36 n/c 37 clk 38 le 39 d io b 40 vpp pin # function 41 hv out 1 42 hv out 2 43 hv out 3 44 hv out 4 45 hv out 5 46 hv out 6 47 hv out 7 48 hv out 8 49 hv out 9 50 hv out 10 51 hv out 11 52 hv out 12 53 hv out 13 54 hv out 14 55 hv out 15 56 hv out 16 57 hv out 17 58 hv out 18 59 hv out 19 60 hv out 20 pin # function 61 hv out 21 62 hv out 22 63 hv out 23 64 hv out 24 65 hv out 25 66 hv out 26 67 hv out 27 68 hv out 28 69 hv out 29 70 hv out 30 71 hv out 31 72 hv out 32 73 hv out 33 74 hv out 34 75 hv out 35 76 hv out 36 77 hv out 37 78 hv out 38 79 hv out 39 80 hv out 40 pin description (80-lead pqfp) downloaded from: http:///
supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receive s an adequate product liability indemnification insu rance agreement. supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defect ive due to workmanship. no responsibility is assume d for possible omissions and inaccuracies. circuitr y and specifications are subject to change without notice . for the latest product specifications refer to th e supertex inc. (website: http//www.supertex.com) ?2010 supertex inc. all rights reserved. unauthorized use or reproduct ion is prohibited. supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 tel: 408-222-8888 www.supertex.com 6 hv507 (the package drawing(s) in this data sheet may not re?ect the most current speci?cations. for the la test package outline information go to http://www.supertex.com/packaging.html .) doc.# dsfp-hv507 a062110 80-lead pqfp package outline (pg) 20.00x14.00mm body, 3.40mm height (max), 0.80mm pitch, 3.90mm footprint symbol a a1 a2 b d d1 e e1 e l l1 l2 1 dimen- sion (mm) min 2.80* 0.25 2.55 0.30 23.65* 19.80* 17.65* 13.80* 0.80 bsc 0.73 1.95 ref 0.25 bsc 0 o 5 o nom - - 2.80 - 23.90 20.00 17.90 14.00 0.88 3.5 o - max 3.40 0.50* 3.05 0.45 24.15* 20.20* 18.15* 14.20* 1.03 7 o 16 o jedec registration mo-112, variation cb-1, issue b, sept.1995. * this dimension is not speci?ed in the jedec drawing. drawings not to scale. supertex doc. #: dspd-80pqfppg, version c041309. 1 80 seating plane gauge plane l l1 l2 view b view b 1 b e side view a2 a a1 e e1 d d1 seating plane top view note 1(index area d1/4 x e1/4) note: a pin 1 identi?er must be located in the index area indicated. the pin 1 identi?er can be: a molded mark/identi?er; an embedded metal marker; or a printed indicator. 1. downloaded from: http:///
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